Path: OKDatasheet > Semiconductor Datasheet > TI Datasheet > SN74LVC112ADBLE
SN74LVC112ADBLE manual: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Path: OKDatasheet > Semiconductor Datasheet > TI Datasheet > SN74LVC112ADBLE
SN74LVC112ADBLE manual: DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
Manufacturer : TI
Packing : DB
Pins : 16
Temperature : Min -40 °C | Max 85 °C
Size : 140 KB
Application : DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET