Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/194-12AI
M5LV-512/194-12AI manual: 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/194-12AI
M5LV-512/194-12AI manual: 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Manufacturer : Lattice
Packing : BGA
Pins : 256
Temperature : Min -40 °C | Max 85 °C
Size : 1126 KB
Application : 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)