Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-128/104-12VI
M5LV-128/104-12VI manual: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-128/104-12VI
M5LV-128/104-12VI manual: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Manufacturer : Lattice
Packing : TQFP
Pins : 100
Temperature : Min -40 °C | Max 85 °C
Size : 1126 KB
Application : 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)