Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/184-7HC
M5LV-512/184-7HC manual: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/184-7HC
M5LV-512/184-7HC manual: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Manufacturer : Lattice
Packing : PQFP
Pins : 100
Temperature : Min 0 °C | Max 70 °C
Size : 1126 KB
Application : 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)