Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/120-15YC
M5LV-512/120-15YC manual: 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-512/120-15YC Similar
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- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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- M5LV-128/104-10YI
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- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-12YI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5LV-128/104-15VI
- 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-512/120-15YC Datasheet and M5LV-512/120-15YC manual
Manufacturer : Lattice
Packing : PQFP
Pins : 100
Temperature : Min 0 °C | Max 70 °C
Size : 1126 KB
Application : 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-512/120-15YC PDF Download