Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-128/68-10VI
M5LV-128/68-10VI manual: 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-128/68-10VI Similar
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- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5LV-128/68-10VI Datasheet and M5LV-128/68-10VI manual
Manufacturer : Lattice
Packing : TQFP
Pins : 100
Temperature : Min -40 °C | Max 85 °C
Size : 1126 KB
Application : 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-128/68-10VI PDF Download