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IW4027BN manual: Dual JK flip-flop, high-voltage silicon-gate CMOS
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IW4027BN Datasheet and IW4027BN manual
Manufacturer : Integral
Packing : Plastic DIP
Pins : 16
Temperature : Min -55 °C | Max 125 °C
Size : 93 KB
Application : Dual JK flip-flop, high-voltage silicon-gate CMOS
IW4027BN PDF Download