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SL74HC4046N manual: Phase-locked loop. High-performance silicon-gate CMOS.
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SL74HC4046N Datasheet and SL74HC4046N manual
Manufacturer : System Logic
Packing : DIP
Pins : 16
Temperature : Min -55 °C | Max 125 °C
Size : 147 KB
Application : Phase-locked loop. High-performance silicon-gate CMOS.
SL74HC4046N PDF Download