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SL4019BN manual: Quad AND/OR select gate. High-voltage silicon-gate CMOS.
SL4019BN Similar
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SL4019BN Datasheet and SL4019BN manual
Manufacturer : System Logic
Packing : DIP
Pins : 16
Temperature : Min -55 °C | Max 125 °C
Size : 47 KB
Application : Quad AND/OR select gate. High-voltage silicon-gate CMOS.
SL4019BN PDF Download