Path: OKDatasheet > Semiconductor Datasheet > Mosel Vitelic Datasheet > V53C517405A-60T
V53C517405A-60T manual: 4M x 4 EDO page mode CMOS DRAM, 60ns
Path: OKDatasheet > Semiconductor Datasheet > Mosel Vitelic Datasheet > V53C517405A-60T
V53C517405A-60T manual: 4M x 4 EDO page mode CMOS DRAM, 60ns
Manufacturer : Mosel Vitelic
Packing : TSOP II
Pins : 24
Temperature : Min 0 °C | Max 70 °C
Size : 186 KB
Application : 4M x 4 EDO page mode CMOS DRAM, 60ns