PALCE16V8H-7PC/5 manual: EE CMOS universal programmable array logic, half power, 7ns

PALCE16V8H-7PC/5 Similar

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PALCE16V8H-7PC/5 Datasheet and PALCE16V8H-7PC/5 manual

Manufacturer : Lattice

Packing : DIP

Pins : 20

Temperature : Min 0 °C | Max 75 °C

Size : 697 KB

Application : EE CMOS universal programmable array logic, half power, 7ns