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MACHLV210-15JC manual: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > MACHLV210-15JC
MACHLV210-15JC manual: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns
Manufacturer : Lattice
Packing : PLCC
Pins : 44
Temperature : Min 0 °C | Max 70 °C
Size : 243 KB
Application : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 15ns