Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5-256/104-20YI
M5-256/104-20YI manual: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5-256/104-20YI Similar
- M5-256/104-10YC
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-10YI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-10YI
- 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-12YC
- 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-15YC
- 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-15YI
- 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-20YI
- 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
- M5-256/104-5YC
- 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5-256/104-20YI Datasheet and M5-256/104-20YI manual
Manufacturer : Lattice
Packing : PQFP
Pins : 100
Temperature : Min -40 °C | Max 85 °C
Size : 1126 KB
Application : 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5-256/104-20YI PDF Download