GAL18V10B-7LJ manual: High performance E2CMOS PLD generic array logicTM (96 x 36), low power, 7.5ns

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GAL18V10B-7LJ Datasheet and GAL18V10B-7LJ manual

Manufacturer : Lattice

Packing : PLCC

Pins : 20

Temperature : Min 0 °C | Max 75 °C

Size : 291 KB

Application : High performance E2CMOS PLD generic array logicTM (96 x 36), low power, 7.5ns