HC2509C manual: Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C Similar

HC2509C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM
HC2510C
- Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM

HC2509C Datasheet and HC2509C manual

Manufacturer : Hyundai

Packing : TSSOP

Pins : 24

Temperature : Min 0 °C | Max 85 °C

Size : 92 KB

Application : Low-skew, low jitter, phase-locked loop (PLL) clock driver, distributing high frequency clock signals for SDRAM