Path: OKDatasheet > Semiconductor Datasheet > Fairchild Datasheet > DM74S112N
DM74S112N manual: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Path: OKDatasheet > Semiconductor Datasheet > Fairchild Datasheet > DM74S112N
DM74S112N manual: Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs
Manufacturer : Fairchild
Packing : MDIP
Pins : 16
Temperature : Min 0 °C | Max 0 °C
Size : 47 KB
Application : Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs