Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/192-20AI
M5LV-512/192-20AI manual: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Path: OKDatasheet > Semiconductor Datasheet > Lattice Datasheet > M5LV-512/192-20AI
M5LV-512/192-20AI manual: 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
Manufacturer : Lattice
Packing : BGA
Pins : 256
Temperature : Min -40 °C | Max 85 °C
Size : 1126 KB
Application : 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)